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 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
(25 Series) PI74FCT2543T
PI74FCT543T/544T (25 Series) PI74FCT2543T PI74FCT543T/544T LATCHED TRANSCEIVERS
Fast CMOS Latched Transceivers
Product Features:
* PI74FCT543T/544/2543T is pin compatible with bipolar FASTTM Series at a higher speed and lower power consumption * 25 series resistor on all outputs * TTL input and output levels * Low ground bounce outputs * Extremely low static power * Hysteresis on all inputs * Industrial operating temperature range: -40C to +85C * Packages available: - 24-pin 300 mil wide plastic DIP (P) - 24-pin 150 mil wide plastic QSOP (Q) - 24-pin 150 mil wide plastic TQSOP (R) - 24-pin 300 mil wide plastic SOIC (S) * Device models available on request
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.8 micron CMOS technology, achieving industry leading speed grades. All PI74FCT2XXX devices have a built-in 25 ohm series resistor on all outputs to reduce noise because of reflections, thus eliminating the need for an external terminating resistor. The PI74FCT543T/544T and PI74FCT2543T is an 8-bit wide non-inverting transceiver designed with two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0-A7 or to take data from B0-B7, as indicated in the Truth Table. With CEAB LOW, a LOW signal makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change the A inputs. With CEAB and OEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEAB, LEAB, and OEAB inputs. The PI74FCT543T is a noninverting of the PI74FCT544T.
PI74FCT543/544/2543T Logic Block Diagram
D LE A0
Q
DETAIL A
B0
Q
D LE
A1 A2 A3 A4 A5 A6 A7 DETAIL A x 7
B1 B2 B3 B4 B5 B6 B7
OEBA OEAB CEBA LEBA CEAB LEAB
NOTE: PI74FCT543/2543T function is shown.
1
PS2020A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT543T/544T (25 Series) PI74FCT2543T LATCHED TRANSCEIVERS
PI74FCT543/544/2543T Product Pin Configuration
Product Pin Description
Pin Name OEAB OEBA CEAB CEBA LEAB LEBA A0-A7 B0-B7 GND VCC Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs Ground Power
24-PIN P24 Q24 R24 S24
PI74FCT543/2543T Truth Table (Non-Inverting)(1,2) For A-to-B (Symmetric with B-to-A)
Inputs LEAB -- H -- L H Latch Status A-to-B Storing Storing -- Transparent Storing Output Buffers B0-B7 High-Z -- High Z Current A Inputs Previous* A Inputs
CEAB H -- -- L L 1.
OEAB -- -- H L L
2.
*Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level -- = Don't Care or Irrevelant A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA, and OEBA.
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PS2020A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT543T/544T (25 Series) PI74FCT2543T LATCHED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. -65C to +150C Ambient Temperature with Power Applied ................................. -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... -0.5V to +7.0V DC Input Voltage ......................................................................... -0.5V to +7.0V DC Output Current ................................................................................... 120 mA Power Dissipation ......................................................................................... 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 5%)
Parameters Description VOH VOL VOL VIH VIL IIH IIL IIH IIL IOZH IOZL VIK IOFF IOS VH Test Conditions(1) IOH = -15.0 mA IOL = 64 mA IOL = 12 mA (25 Series) 2.0 0.8 VIN = VCC VIN = GND VIN = VCC VIN = GND VOUT = 2.7V VOUT = 0.5V VCC = Min., IIN = -18 mA VCC = GND, VOUT = 4.5V VCC = Max. , VOUT = GND
(3)
Min. Typ(2) Max. Units 2.4 3.0 0.3 0.3 0.55 0.50 V V V V V A A A A A A V A mA mV
Output HIGH Voltage VCC = Min., VIN = VIH or VIL Output LOW Current Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current Input HIGH Current Input LOW Current High Impedance Output Current Clamp Diode Voltage Power Down Disable Short Circuit Current Input Hysteresis VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level (Except I/O pins) VCC = Max. (Except I/O pins) VCC = Max. (I/O pins Only) VCC = Max. (I/O pins Only) VCC = Max. VCC = MAX.
1 -1 1 -1 1 -1 -0.7 -- -60 -- -120 200 -1.2 100
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
3
PS2020A 03/11/96
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PI74FCT543T/544T (25 Series) PI74FCT2543T LATCHED TRANSCEIVERS
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) VCC = Max. VCC = Max. VCC = Max., Outputs Open CEAB and OEAB = GND CEBA = VCC One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC fI = 5 MHZ One Bit Toggling VCC = Max., Outputs Open fCP = 10 MHZ (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = Vcc Eight Bits Toggling fI = 2.5 MHZ 50% Duty Cycle Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.0 0.25 Units A mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
1.5
3.5(5)
mA
2.0
5.5(5)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
3.8
7.3(5)
6.0
16.3(5)
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
4
PS2020A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT543T/544T (25 Series) PI74FCT2543T LATCHED TRANSCEIVERS
PI74FCT543/2543T (non-inverting) Switching Characteristics over Operating Range
543T/2543T Com. 543AT/2543AT Com. Max Min Max Min 543CT/2543CT Com. Max Min 543DT Com. Max Unit
Parameters Description tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tSU tH tW Propagation Delay Transparent Mode AN to BN or BN to AN Propagation Delay LEBA to AN, LEAB to BN Output Enable Time OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Output Disable Time(3) OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Setup Time, HIGH or LOW AN or BN to LEBA or LEAB Hold Time, HIGH or LOW AN or BN to LEBA or LEAB LEBA or LEAB Pulse Width LOW(3)
Conditions(1) CL = 50 pF RL = 500
Min
2.5 2.5 2.0
8.5 12.5 12.0
2.5 2.5 2.0
6.5 8.0 9.0
2.5 2.5 2.0
5.3 7.0 8.0
2.5 2.5 2.0
4.4 5.0 5.4
ns ns ns
2.0
9.0
2.0
7.5
2.0
6.5
2.0
4.3
ns
3.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
1.5 1.5 3.0
-- -- --
ns ns ns
PI74FCT544T (inverting) Switching Characteristics over Operating Range
544T Com. 544AT Com. Max Min Max Min 544CT Com. Max Unit
Parameters Description tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tSU tH tW Propagation Delay Transparent Mode AN to BN or BN to AN Propagation Delay LEBA to AN, LEAB to BN Output Enable Time OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Output Disable Time(3) OEBA or OEAB to AN or BN CEBA or CEAB to AN or BN Setup Time, HIGH or LOW AN or BN to LEBA or LEAB Hold Time, HIGH or LOW AN or BN to LEBA or LEAB LEBA or LEAB Pulse Width LOW(3)
Conditions(1) CL = 50 pF RL = 500
Min
2.5 2.5 2.0
8.5 12.5 12.0
2.5 2.5 2.0
6.5 8.0 9.0
2.5 2.5 2.0
5.3 7.0 8.0
ns ns ns
2.0
9.0
2.0
7.5
2.0
6.5
ns
3.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
5
PS2020A 03/11/96


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